XSB-300E

  • XSB-300E image 0
  • XSB-300E image 0
  • XSB-300E image 1
  • XC2S300E FPGA
  • XC9572 CPLD
  • 256K x 16 SRAM
  • 8M x 16 SDRAM
  • 512K x 8 Flash
  • 6-channel PAL/SECAM/NTSC video decoder
  • 12-bit, 30 MSPS ADC
  • 80 MHz, 30-bit video DAC
  • VGA monitor port
  • 20-bit, 4-input, 1-output stereo codec
  • Microphone/line-in/line-out jacks
  • 10/100 Ethernet MAC+PHY
  • USB 2.0 peripheral port
  • Six pushbuttons
  • DIP switch
  • Two LED digits
  • LED bargraph
  • Three programmable oscillators
  • Two expansion headers with 75 general-purpose I/O
  • Peripheral header with 18 general-purpose I/O
  • Parallel port connector
  • Serial port connector
  • Compact Flash interface
  • IDE hard disk interface
  • ATX power input or 9 VDC power jack
  • XSTOOLs CD

Currently unrated


The XSB Board brings you the power of the XILINX Spartan-2E FPGA embedded in a framework for processing video and audio signals.  The XSB-300E Board provides an XC2S300E FPGA with 300,000 gates.   The XSB-300E can accept six channels of PAL, SECAM, or NTSC video with up to 9-bits of resolution on the red, green, and blue channels and can output video images through a 80 MHz, 30-bit video DAC.  The XSB-300E can also process four channels of stereo audio with up to 20 bits of resolution and a bandwidth of 20 KHz.  A 256K x 16 SRAM and an 8M x 16 SDRAM are provided for local buffering of signals and data.  An IDE hard disk or Compact Flash card can be connected to the XSB-300E for long-term non-volatile storage.

The XSB-300E Board has a variety of interfaces for communicating with the outside world: parallel and serial ports, USB 2.0 port, and 10/100 Ethernet PHY layer interface.  There are also two independent expansion ports with a total of 75 general purpose I/O pins connected directly to the XC2S300E and an additional peripheral expansion port with 18 I/O pins.

You configure the XSB-300E Board through a PC parallel port or from a bitstream stored in the 4 Mbit Flash RAM.  The Flash RAM can also store data for use by the FPGA after configuration is complete.

XESS product picture
XESS product picture